Engineering Projects

In the article 5-Decade Counter with Multiplexed Output we will discuss about decade counter it’s key parameter and its applications. Let’s start with description. 5-Decade Counter with Multiplexed Output Description This IC is an example of a specific system function implementation. As illustrated in figure 1, the IC contains five-decade counters in cascade. In effect, then, the first counter, 100, will count from 0through 9, the second counter 101, will count from 10 to 90, and so on. The total maximum count of this unit is 99,999. The output of…

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In this article we will discuss about two different counter IC, Programmable and Up Down Counter IC. Programmable divide by N counter IC (F4526) and UP Down counter (SN74192). We will discuss about key parameter and applications. At first we will discuss about programmable divide by N counter and then Up Down Counter. Programmable Divide by N Counter Description Each flip-flop (FF) in this counter can be programmed for either 0 or 1, allowing the user to determined the desired division of the input (clock) frequency. A set of program…

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In the article “Asynchronous Counter IC | SN74196”, we will discuss key parameters and applications of asynchronous counter IC SN74196. Let’s start with a description. Description of Asynchronous Counter IC | SN74196 This type of counter can be accepting data that occur at any time. Whenever a new transition appears at the input, the effect of this change ripples down through the series of flip-flops (FF). Because there is no clock input to control the transition of each FF, an asynchronous counter is more subjected to ransom noise than the…

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Here, in this article we will discuss about Synchronous Counter IC SN74162, its key parameter and its application. Description of Synchronous Counter IC SN74162 Synchronous counters are available in a large variety of sizes and with a number of standard output decoders. The essential features of this type of counter can be seen from the illustration of figure 1(a). Each of the flip-flops (FF) is controlled by the clock signal. Whatever data are entered must be entered in synchronism with the clock, because only when clock enables each FF can…

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The essential function in all counter or  divider IC is performed by the basic flip-flop (FF) which changes states only on either a positive or a negative going transaction. If a pulse or square-wave signal is applied to the input of an FF with positive logic, it will change state only on the rising edge of the signal. For every two pulses or square waves at the input, only one square wave will be available at the output. Every FF has a Q and Q bar output, one being the…

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Here in this article we will discuss about Non-Inverting 3 State Buffer, its key parameters and its applications. Non-Inverting 3 State Buffer Description: This IC contains six identical non-inverting buffers, arranged in two groups, as illustrated in figure 1. The first group of two buffers is controlled by the “disable A” signal. The seconds group of four buffers is controlled by the “disabled B” signal. This provides three possible output states. When the respective disable signal is 0, the output will be the same as the input, with the usual…

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In the article “True Complement Buffer IC | CD4041” we will discuss about true complement buffer IC, it’s key parameters and application. Description of True Complement Buffer IC | CD4041 Usually available with four identical circuits on a single IC, this buffer provides both the true output and its complement. As illustrated in figure 1, the complement of the input is provided by a single inverter stage while the true output is provided by two stages. The circle at the input of the second stage indicates that, while this circuit…

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