Antilogarithmic Amplifier | Derivation

Antilogarithmic amplifier is one whose output is antilogarithmic (exponential) of input. Like logarithmic amplifier, antilogarithmic is also a non-linear amplifier.

Antilogarithmic Amplifier using Single Transistor

The circuit arrangement for Antilogarithmic amplifier is illustrated in figure 1. Here a general purpose NPN transistor is connected to inverting input of op-amp. A resistor is connected in feedback path. The output is depending upon output current of transistor and feedback resistor.

Now for diagram, output voltage can be written as

V_0 = -R_f \times I_C             …..(1)

Where, Is = Saturation current

VT = Thermal Voltage

antilogarithmic amplifier circuit

I_C = I_s \times (e^{\dfrac{V_{BE}}{V_T}-1})

As we know that, e^{\dfrac{V_{BE}}{V_T}}>>1

Thus, we can write I_C = I_{s} \times e^{\dfrac{V_{BE}}{V_T}}

Now putting the value of collector current of transistor IC in equation 1. The output voltage expression becomes

V_O = -R_f \times I_s \times e^{\dfrac{V_{BE}}{V_T}}

From the figure we can also conclude that transistor base emitter voltage (VBE) is equivalent input voltage Vi i.e. V_{BE} = V_i

Thus, we can also write output voltage in contest of input voltage Vi

V_0 = -R_f \times I_s \times e^{\dfrac{V_i}{V_T}}

Antilogarithmic Amplifier using Matched Diode

The figure of anti-logarithmic amplifier using matched diode is shown in figure below. Two matched diodes are used here, where one diode (D1) is connected in feedback path and second diode (D2) is connected to inverting input of op-amp (A2) in reverse bias mood as shown in figure 2.

antilogarithmic amplifier using two matched diode

Voltage at inverting pin of op-amp (A1) is potentially equal to voltage at non-inverting input of op-amp i.e. inverting input voltage = non-inverting input voltage = V+ say. Thus, we can write

V^+ = \dfrac{R_1}{R_1 + R_2}\times V_s       ……(2)

Now, we can use KVL in order to solve for V+ voltage.

V^+ -V_{D1} + V_{D2} = 0

V^+ = V_{D1} -V_{D2}        …..(3)

Now, solving for diode

I_D = I_s \times (e^{\dfrac{V_D}{\eta V_T}}-1)

Where, \eta = material constant

We know that V^{\dfrac{V_D}{\eta V_T}} >> 1

Thus, we can write

I_D = I_s \times e^{\dfrac{V_D}{\eta V_T}}

Output voltage of diode VD can be written as,

V_D = \eta \times V_T \times ln(\dfrac{I_D}{I_s})

Now, we can calculate individual diode voltage i.e. VD1 and VD2.

V_{D1} = \eta_1 \times V_{T1} \times ln(\dfrac{I_f}{I_{s1}})

 

V_{D2} = \eta_2 \times V_{T2} \times ln(\dfrac{I_2}{I_{s2}})

Assuming both diode and matched thus material constant, thermal voltage of diode and saturation current of diode is also same. Thus, we can write

\eta_1 = \eta_2 = \eta

 

V_{T1} = V_{T2} = V_T

 

I_{s1} = I_{s2} = I_s

From equation 3, we can write

V^+ = \eta \times V_T \times ln(\dfrac{I_f}{I_2})

 

 = -\eta \times V_T \times ln(\dfrac{I_2}{I_f})

 

I_2 = \dfrac{V_0}{R_f}

Putting the value of I2 in equation V+

V^+ = -\eta \times V_T \times ln(\dfrac{V_o}{R_f \times I_f})        …..(4)

Now from equation 2 and 4 we can write

\dfrac{R_1}{R_1 + R_2} \times V_s = -\eta \times V_T ln(\dfrac{V_o}{R_f \times I_f}) V_o = I_f \times R_f \times exp[\dfrac{-V_s}{\eta \times V_T} \times \dfrac{R_1}{R_1 + R_2}]
  • Temperature sensitive factor \eta \times V_T can be eliminated by adjusting voltage divider also temperature sensitive in such a way that their effect get can canceled.

Antilogarithmic Amplifier using Two Matched Transistors

The figure of anti-logarithm amplifier is shown in figure 3. Two matched transistors is used here as shown in figure, where input is given to the non-inverting amplifier pin of first op-amplifier A1.

antilogarithmic amplifier using matched transistor

Now form figure,

V^+ = \dfrac{R_4}{R_3 + R_4} \times V_s         ……(5)

V^+ -V_{BE1} + V_{BE2} = 0

V^+ = V_{BE1} -V_{BE2}        …..(6)

For transistor,

I_c = I_s \times (e^{\dfrac{V_{BE}}{V_T}}-1)

We know that, e^{\dfrac{V_{BE}}{V_T}}>>1

I_c = I_s \times e^{\dfrac{V_{BE}}{V_T}}

 

V_{BE} = V_T \times ln(\dfrac{I_c}{I_s})

Now, we can drive base emitter voltage of each transistor.

Base emitter voltage of 1st transistor VBE1 can be written as

V_{BE1} = V_{T1} \times ln(\dfrac{I_{c1}}{I_{s1}})

Base emitter voltage of 2nd transistor can be written as

V_{BE2} = V_T \times ln(\dfrac{I_{c2}}{I_{s2}})

Assuming both transistors are matched. Thus, thermal voltage of 1st transistor will be same to thermal voltage of 2nd transistor and saturation current of 1st transistor will be equal to saturation current of 2nd transistor. i.e.

V_{T1} = V_{T2} = V_T;

 

I_{s1} = I_{s2} = I_s

From figure we can write,

I_{C1} = \dfrac{V_R-V^+}{R_2}

As we know that V^+ = V_{B1}-V_{B2} is very small. Thus we can write V^+ = 0

Now we can write,

I_{C1} = \dfrac{V_R}{R_2}

And I_{C2} = \dfrac{V_o}{R_1}

From equation 6

V_{BE1}-V_{BE2} = V_T \times ln(\dfrac{I_{c1}}{I_{C2}})

 

= V_T \times ln(\dfrac{V_R}{R_2}\times \dfrac{R_1}{V_o})

 

= -V_T \times ln(\dfrac{V_0}{V_R} \times \dfrac{R_2}{R_1})

From equation 1

\dfrac{R_4}{R_3 + R_4}\times V_s = -V_T \times ln(\dfrac{V_o}{V_R}\times \dfrac{R_2}{R_1})

 

V_0 = \dfrac{V_R\times R_1}{R_2} \times exp[-\dfrac{V_s \times R_4}{V_T(R_3 + R4)}]

This Anti-logarithmic is temperature sensitive.

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