The generation of frequency shift keying (FSK) can be easily accomplished by switching an additional capacitor into the tank circuit of an oscillator when the transmitter is keyed, in narrowband frequency shift keying (FSK) it is often possible to get the required frequency shift by shunting the capacitance directly across a crystal, especially if frequency multiplier follow the oscillator, as is usually the case.
Circuit Description of Frequency Shift Keying (FSK) Generator Using PLL 565
Frequency shift keying (FSK) can also be generated by applying the rectangular wave modulating signal to a VCO. The circuit diagram of such a system is shown in figure 1. The VCO output is the desired FSK signal, which is then transmitted to an FM receiver.
A receiver is a standard unit up through the IF amps. At that point, a 565 (IC1) PLL is used for detecting the original modulating signal. As the IF output signal appears at the PLL input, the loop locks to the input frequency and tracks it between the two frequencies with a corresponding dc shift at its output, pin 7.
The loop filter capacitor C4 is chosen to set the proper overshoot on the output, and the three-stage ladder filter is used to remove the sum frequency component. The PLL output signal is a rounded-off version of the original binary modulating signal and is therefore applied to the comparator circuit build around 710 (IC2) to make it logic compatible. The output is obtained from pin 9 of IC2 as shown in figure 1.
PARTS LIST OF FREQUENCY SHIFT KEYING GENERATION USING PLL 565
Resistor (all ¼-watt, ± 5% Carbon)
R1, R2 = 600 Ω
R3 =  KΩ
R4 – R6 = 10 KΩ
Capacitors
C1 = 0.1 µF (Ceramic Disc)
C2 = 0.001 µF (Ceramic Disc)
C3 = 0.05 µF (Ceramic Disc)
C4 – C7 = 0.2 µF (Ceramic Disc)
Semiconductors
IC1 = 565 (general purpose phase locked loops IC)
IC2 = 710 (BiCMOS operational amplifiers with a CMOS input stage.)