A single beam CRO can be used for simultaneous display of two signals using this simple circuit. The circuit uses one NE555 and two LM741 ICs, beside some passive components. The diode (1N4148) is used to get 50 percent duty cycle.
Circuit Description of Dual Trace Generator Circuit
IC 555 is connected in astable mode and act as a self-switching analogue switch between the two signals to be displayed on the CRO. The output of IC 555 is given to the CRO. In order to display the two waveforms at different positions, a DC shift is given to one of the waveforms.
Output of IC2 switches between two voltage levels (Vcc and GND) at pin 8 and 1. The frequency of switching is decided by the external RC network. The output frequency of IC 555 in independent of the supply voltage and remains constant over the entire operating range of voltage, i.e. from 3V to 18V. Therefore, if two independent time varying signals are fed at pins 1 and 8, the output of IC3 will switch between the voltage levels at two pins with constant frequency. The signals should be within the operation range and of correct polarity.
One of the signals to be displayed is given sufficient positive DC shift and fed at Vcc terminal. The other signal is fed at the ground terminals (pin 1) of IC 555 through a buffer. The output of IC555 automatically switches between these two levels and the signals are displayed on the CRO with the given DC shift between these levels them. The tracing between these levels is not visible because the switching frequency is very high compared to the frequency of input signals.
Each 741 is connected as a unity-gain adder in the non-inverting mode, to give the required DC shift to one of the waveforms. When there is on signal, two beams will be displayed on the CRO.
Since it is measuring instrument, the circuit will not load the source, i.e. minimum current will be drawn from the source.
The DC shift should be sufficient for worst conditions of input signals, i.e. when signal 2 is at its positive peak and signal 1 is at negative peak, the potential difference between these terminals should not be less than 5V. when signal 1 is at positive peak and signal 2 at negative peak, the potential difference should not exceed 18V.
The capacitors of 0.01 µF, normally connected between pins 1 and 5, is not connected to avoid unwanted modulation of the displayed waveforms. For large waveforms, the input signals must be attenuated before feeding the circuit.
One disadvantage of the circuit is that the signals cannot be overlapped on the CRO for comparison.
PARTS LIST OF DUAL TRACE GENERATOR CIRCUIT
|Resistor (all ¼-watt, ± 5% Carbon)|
|R1, R3, R6 = 10 KΩ
R2 = 4.7 KΩ
R4, R5 = 1 KΩ
|C1 = 0.01 µF|
|IC1, IC2 = LM741
IC2 = NE555
D1 = 1N4148