Quite often electronics engineers and technicians come across the problem of fault finding or testing electronic circuit boards full of digital integrated circuits. A handy and quick look-tool ‘5-State Digital IC and Circuit Tester’ for such an analysis is a logic probe which does the job faster and easier by just touching this probe to different pins of various ICs and observing the logic levels.
Most of the commercial available logic probes show only two distinct levels of logic ‘0’ and logic ‘1’ corresponding to voltage levels of 0V to +0.8V and +2.4V to +5V respectively, for TTL circuits. But sometime it becomes necessary to know the voltage levels at the pins of the IC designated as ‘+Vcc’ and ‘GND’ pins-to state correctly, ‘short-to-positive or +5v’ and short-to-ground or 0V’ respectively. Similarly, in circuits using tri-state logic IC in microcomputer boards, it is very much essential to know whether a particular pin of an IC is at ‘tri-state’ level or not-tri-state level voltage being that in between +0.8V and +2.4V/.
Thus, beside the normal two logic levels, the above mentioned three more logic levels are also required to be known in many instance. Hence, a 5-state logic probe is described here.
Principle of Operation of 5-State Digital IC and Circuit Tester
The voltage to be sensed by the tip of the probe is made to pass through four different paths. Depending upon the sensed voltage level, one or more path allows the signal to flow and affect the logic levels in that channel further, and thereby generate appropriate logic state at the input of the 7-segment display to show the correct logic state.
The voltage levels at various points in the circuit change as per the input voltage level at the tip for different logic states.
A short-to-ground state at the tip of the probe is detected whenever the input voltage level is between 0V and +50mV. Since the voltage level is below +50mV at the input point ‘A’, transistor T1 does not conduct, allowing transistor T2 to conduct heavily and go into saturation. This does not allow T3 to conduct, and thereby voltage at the junction of R4 and R5, i.e. at an input NAND gate N2, and that means one of the inputs of N3, to be at logic ‘1’ level.
Input at point ‘B’ does not allow T4 to conduct, so the second input of N3 is at ‘zero’. Hence output of N3, which is an input to N2, is at logic ‘1’ state.
Input of less than +50 mV at point ‘C’ makes diode D1 to conduct, which being germanium type allows a drop of 0.1V across it and one input of gate N1 becomes maximum at +0.15V. Output of N1, which is one if the input of N4, will be thus at logic ‘1’ level.
Now, the fourth branch input at point ‘D’ makes transistor T5, connected as a diode, to conduct; the potential at the base of T6 does not exceeds +0.5 volt, and so it does not conduct fully. Resistor R9 and R10 are adjusted such that T7 conducts heavily, making one of the inputs of the gates N4, and N7 to be at logic ‘0’ level.
Thus, except the gate N7 all the other N4, N5 and N8 have both the inputs at logic ‘1’ level, and hence their outputs will be at logic ‘0’ level. Only gate N7 has one of the inputs at logic ‘0’, and so its output will be logic ‘1’, illuminating element ‘d’ of the 7-segment display. Element ‘g’ of the 7-segment display connected to collector of transistor T8 also does not glow. This is because outputs of N5 and N6 are low and output of N7 is high. Resistor R13, R14 and R15 being of the same value, the base potential of T8 is more than +0.7 V, and as such it goes saturation and being down its collector potential.
Logic ‘0’ of ‘low state’
Whenever the input voltage at the probe tip between +50 mV and +0.8V, a logic ‘0’ state is said to be existing. This voltage level has the same effect on branch C as before. Thus, the output of N1, which is also one of the inputs to N4, acquires logic ‘1’ state. Now, this time, the input voltage level at point D makes voltage level at the base of transistor T6 to be more then +0.5V, and it conducts sufficiently to bring down its collector potential below +0.8V. Resistor R9, R10 and R11 are adjusted such that collector voltage level of T7 goes high to more than +2.5 V so that the second input of gate N4 goes to logic ‘1’ state.
This brings down the output of N4, which is also one of the inputs of gates N5, N6, N7 and N8, to logic ‘0’ state. Thus, irrespective of conditions at the output inputs of gates N5, N6, N7 and N8, their outputs are pulled up to logic ‘1’ level and hence six elements a, b, c, d, e and f of the 7-segment display are illuminated. Only elements g is not illuminated because of similar logic as in the first condition (T8 is deeper in saturation and collector potential of T8 is low)
When a voltage level at output of an IC is more than +0.8V, but less then +2.4V, a Tri-state or high-impedance state is said to be existing. When the probe comes in contact with such a pin, branch A behaves similarly as in earlier two cases, and output of gate N2 is high.
At the input to branch B, although input is greater than +0.8V, resistor R6 being 15 K, this voltage is not sufficient to make T4 conduct sufficiently and so potential at emitter of T4 is still near zero. Therefore, output of N3 is high. Branch D also behaves in a similar fashion, as descried in the condition of logic ‘0’ state, bringing collector of T7 to high state.
Only branch C behaves in a different manner. Because input is more than +0.8V, the drop across diode D1 makes input of gate N1 to low state and the output of N4 goes high.
Thus, all the four gates N5, N6, N7 and N8 have both their inputs at high state and, therefore, there outputs at ‘low’ state blank all the elements a to f. This time, as the resistor R13, R14 and R15 are connected to low potential, base voltage T8 is pulled down to below +0.3 V, and hence T8 is driven towards cut-off condition. This allows elements ‘g’ to be illuminated.
Logic ‘1’ or ‘high’ state
A voltage level of more than +2.4 V is considered to be logic ‘1’ or ‘high’ state. To distinguish this state from supply voltage of +5V, state ‘1’ is considered to have a voltage level of more than +2.4V but less than +4.95V whenever this condition is present at the input, branch A still behaves as in earlier three conditions, except that transistor T2 conducts lesser and T3 starts conducting more. But still potential at collector of T3 is not sufficient to bring R4 and R5 junction to logic ‘1’ state, and so output of N2 is still high.
Branches C and D also behaves as in the previous case of Tri-state condition, and hence outputs of N4 and collector potential of T7 are at ‘high’ state. This time, the input at B is sufficient to make T4 conduct, so that collector of T4 is high enough to pull down output of N3 to ‘low’ state.
Thus, outputs of N5, N7 and N8 are low, whereas that of N6 is high. Elements b and c only therefore light up.
Short-to-positive or +5V state
This state, as described earlier, is shown when input is greater than +4.95 V. it is something important to heck that the supply voltage pins of the ICs are correctly at +5V. For this input voltage, branches, B, C and D behave exactly as in the previous logic ‘1’ state condition. But this time, in branch A, since base potential of T2 goes high to more than +4.95V, it conducts much less, making drop across R2, R3 less. This allows T3 to go into saturation, and hence potential at junction of R4 and R5 is more than +2V. Thus, output of N2 is at logic ‘low’. Outputs of N2, N3 and N4 are therefore all low, whereas that of N1 is high. Thus, only element ‘a’ is illuminated.
A common-cathode 7-segment display as the one used here or any other equivalent available would do the job of display. A 5.6V Zener diode (ZD1) at the input point of the probe prevents the circuit from damaging, when touched accidently to voltage more than, +5.6V. since digital circuits have maximum recommended operating voltage of +5.5V, one is not supposed to come across any potential higher than this in a digital circuit board. Nevertheless, ZD1 safeguards the logic probe in case of eventuality.
PARTS LIST OF 5-STATE DIGITAL IC AND CIRCUIT TESTER
|Resistors (all ¼-watt, ± 5% Carbon)|
|R1, R3, R8, R9, R13, R14, R15 = 1 KΩ|
R2, R10 = 10 Ω
R4, R5, R7 = 330 Ω
R6 = 15 KΩ
R11 = 680 Ω
R12 = 4.7 KΩ
R16 = 150 Ω
|IC1 (N1 – N4), IC2 (N5 – N8) = SN7400|
T1 – T3 = 2N869 (PNP transistor)
T4, T8 = CIL 701 (NPN transistor)
D1 = 1N34A (Diode)
ZD1 = 5.6V Zener Diode
DIS1 = TIL313, FND500 or Any Common Cathode Display